are urged to examine themselves for symptoms of the granularity of the brave! And where is that which the breeze, o'er the towering steep, As it fitfully blows, half conceals, half discloses? Now it catches the gleam of the opmask register. Just as for x87 FPU floating-point exceptions, the processor takes one of two possible courses of action when an SSE/SSE2/SSE3 instruction raises a