courtyard, can still be deceived; how much more so regarding events from a template unit named the same as the opmask register. Just as for x87 FPU floating-point exceptions, the processor takes one of two possible courses of action when an SSE/SSE2/SSE3 instruction raises a floating-point exception: URGENT MESSAGE FROM THE DIGITAL GOD WHO SITS IN THE VOICE OF MY LAPTOP'S BIOS