README fix
[smh-ac440b-litex.git] / smh_ac440b_board.py
1 from litex.build.generic_platform import *
2 from litex.build.altera import AlteraPlatform
3 from litex.build.altera.programmer import USBBlaster
4
5 # I/O --------------------------------------------------------------------------
6
7 _io = [
8
9 # Persistent I/O - fixed on the AC440B itself ------------------------------
10
11 # Clk
12 ("clk50", 0, Pins("T2"), IOStandard("3.3-V LVTTL")),
13
14 # D1-D4
15 ("u_led_n", 0, Pins("V22"), IOStandard("3.3-V LVTTL")),
16 ("u_led_n", 1, Pins("V21"), IOStandard("3.3-V LVTTL")),
17 ("u_led_n", 2, Pins("U22"), IOStandard("3.3-V LVTTL")),
18 ("u_led_n", 3, Pins("U21"), IOStandard("3.3-V LVTTL")),
19
20 # RST, K1-K2
21 ("rst_n", 0, Pins("D2"), IOStandard("3.3-V LVTTL")),
22 ("u_key_n", 0, Pins("W1"), IOStandard("3.3-V LVTTL")),
23 ("u_key_n", 1, Pins("V1"), IOStandard("3.3-V LVTTL")),
24
25 # Persistent I/O end -------------------------------------------------------
26
27 ("serial", 0,
28 Subsignal("tx", Pins("Y22"), IOStandard("3.3-V LVTTL")),
29 Subsignal("rx", Pins("W22"), IOStandard("3.3-V LVTTL"))
30 ),
31
32 ]
33
34 _connectors = [
35
36 ]
37
38 # Platform ---------------------------------------------------------------------
39
40 class Platform(AlteraPlatform):
41 default_clk_name = "clk50"
42 default_clk_period = 1e9/50e6
43
44 def __init__(self, toolchain="quartus"):
45 AlteraPlatform.__init__(self, "EP4CE40F23C8", _io, _connectors, toolchain=toolchain)
46 self.add_platform_command("set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION \"USE AS REGULAR IO\"")
47
48 def create_programmer(self):
49 return USBBlaster()
50
51 def do_finalize(self, fragment):
52 AlteraPlatform.do_finalize(self, fragment)
53 self.add_period_constraint(self.lookup_request("clk50", loose=True), 1e9/50e6)